SCHEDULE: NOV 16-22, 2013

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SPBC: Leveraging the Characteristics of MPI HPC Applications for Scalable Checkpointing

SESSION: Fault-Tolerant Computing

EVENT TYPE: Papers

TIME: 2:00PM - 2:30PM

SESSION CHAIR: Pavan Balaji

AUTHOR(S):Thomas Ropars, Tatiana Martsinkevich, Amina Guermouche, André Schiper, Franck Cappello

ROOM:201/203

ABSTRACT:
The high failure rate expected for future supercomputers requires the design of new fault tolerant solutions. Most checkpointing protocols are designed to work with any message-passing application but suffer from scalability issues at extreme scale. We take a different approach: We identify a property common to many HPC applications, namely channel-determinism, and introduce a new partial order relation, called always-happens-before relation, between events of such applications. Leveraging these two concepts, we design a protocol that combines an unprecedented set of features. Our protocol called SPBC combines in a hierarchical way coordinated checkpointing and message logging. It is the first protocol that provides failure containment without logging any information reliably apart from process checkpoints, and this, without penalizing recovery performance. Experiments run with a representative set of HPC workloads demonstrate a good performance of our protocol during both, failure-free execution and recovery.

Chair/Author Details:

Pavan Balaji (Chair) - Argonne National Laboratory

Thomas Ropars - Swiss Federal Institute of Technology Lausanne

Tatiana Martsinkevich - INRIA and University of Paris Sud

Amina Guermouche - Université de Versailles Saint-Quentin en Yveline

André Schiper - Swiss Federal Institute of Technology Lausanne

Franck Cappello - Argonne National Laboratory

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The full paper can be found in the ACM Digital Library