Abstract: Hardware Transactional Memory (HTM) schemes usually piggyback onto the cache coherence protocol to detect data access conflicts between transactions. We identify an intrinsic mismatch between the coherence scheme and transaction execution which causes a sizable amount of unnecessary transaction aborts. This pathological behavior is called false aborting and increases the amount of wasted computation and on-chip communication, manifesting itself as a performance and energy pitfall in HTM designs. For the TM applications we examined, 41% of the transactional write requests incur false aborting. We propose Predictive Unicast and Notification (PUNO), a novel hardware mechanism to combat false aborting. PUNO reduces transaction aborts by 61% and network traffic by 32% in workloads representative of future TM applications. The improvement is achieved with a meager 0.41% area overhead.