SC13 Home > SC13 Schedule > SC13 Presentation - Programming for the Intel Xeon Phi

SCHEDULE: NOV 16-22, 2013

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Programming for the Intel Xeon Phi

SESSION: Programming for the Intel Xeon Phi

EVENT TYPE: Tutorials

TIME: 8:30AM - 5:00PM

Presenter(s):Lars Koesterke, Luke Wilson, John McCalpin, Kent Milfeld


The Innovative Technology component of the recently deployed XSEDE Stampede supercomputer at TACC provides access to 8 PetaFlops of computing power in the form of the new Intel Xeon Phi Coprocessor, also known as a MIC. While the MIC is x86 based, hosts its own Linux OS, and is capable of running most user codes with little porting effort, the MIC architecture has significant features that are different from that of present x86 CPUs, and optimal performance requires an understanding of the possible execution models and basic details of the architecture. This tutorial is designed to introduce attendees to the MIC architecture in a practical manner. Multiple lectures and hands-on exercises will be used to acquaint attendees with the MIC platform and explore the different execution modes as well as parallelization and optimization through example testing and reports.

Chair/Presenter Details:

Lars Koesterke - Texas Advanced Computing Center

Luke Wilson - Texas Advanced Computing Center

John McCalpin - Texas Advanced Computing Center

Kent Milfeld - Texas Advanced Computing Center

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