SC13 Home > SC13 Schedule > SC13 Presentation - Low-Power, Low-Storage-Overhead Chipkill Correct via Multi-Line Error Correction

SCHEDULE: NOV 16-22, 2013

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Low-Power, Low-Storage-Overhead Chipkill Correct via Multi-Line Error Correction

SESSION: Memory Resilience

EVENT TYPE: Papers

TIME: 11:30AM - 12:00PM

SESSION CHAIR: Scott Pakin

AUTHOR(S):Xun Jian, Henry Duwe, John Sartori, Vilas Sridharan, Rakesh Kumar

ROOM:405/406/407

ABSTRACT:
Due to their large memory capacities, many modern servers require chipkill correct, an advanced type of memory error detection and correction, to meet their reliability requirements. However, existing chipkill correct solutions incur high power or storage overheads, or both because they use dedicated error-correction resources per codeword to perform error correction. This requires high overhead for correction and results in high overhead for error detection. We propose a novel chipkill correct solution, multi-line error correction, that uses resources shared across multiple lines in memory for error correction to reduce the overhead of both error detection and correction. Our evaluations show that the proposed solution reduces memory power by a mean of 27%, and up to 38% with respect to commercial solutions, at a cost of 0.4% increase in storage overhead and minimal impact on reliability.

Chair/Author Details:

Scott Pakin (Chair) - Los Alamos National Laboratory

Xun Jian - University of Illinois at Urbana-Champaign

Henry Duwe - University of Illinois at Urbana-Champaign

John Sartori - University of Minnesota

Vilas Sridharan - Advanced Mirco Devices, Inc.

Rakesh Kumar - University of Illinois at Urbana-Champaign

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The full paper can be found in the ACM Digital Library