SCHEDULE: NOV 16-22, 2013

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A `Cool' Way of Improving the Reliability of HPC Machines

SESSION: Energy Management

EVENT TYPE: Papers

TIME: 1:30PM - 2:00PM

SESSION CHAIR: Taisuke Boku

AUTHOR(S):Osman Sarood, Esteban Meneses, Laxmikant Kale

ROOM:401/402/403

ABSTRACT:
Soaring energy consumption, accompanied by declining reliability, together loom as the biggest hurdles for the next generation of supercomputers. Reliability at exascale level could degrade to the point where failures become the norm. HPC researchers are focusing on improving existing fault tolerance protocols. Research on improving hardware reliability has also been making progress independently. In this paper, we try to bridge this gap and combine both software and hardware aspects towards improving reliability of HPC machines. Fault rates are known to double for every 10 rise in core temperature. We leverage this notion to experimentally demonstrate the potential of restraining processor temperatures and load balancing to achieve two-fold benefits: improving reliability of parallel machines and reducing total execution time required by applications. For a 350K socket machine, regular checkpoint/restart fails to make progress, whereas our validated model predicts an efficiency of 20% by improving the machine reliability by 2.29X.

Chair/Author Details:

Taisuke Boku (Chair) - University of Tsukuba

Osman Sarood - University of Illinois at Urbana-Champaign

Esteban Meneses - University of Illinois at Urbana-Champaign

Laxmikant Kale - University of Illinois at Urbana-Champaign

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The full paper can be found in the ACM Digital Library