SC13 Home > SC13 Schedule > SC13 Presentation - Optimization Methods for Energy Efficient HPC Architectures

SCHEDULE: NOV 16-22, 2013

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Optimization Methods for Energy Efficient HPC Architectures

SESSION: Doctoral Showcase - Early Research Showcase

EVENT TYPE: Doctoral Showcase - Early Research Showcases

TIME: 3:30PM - 5:00PM

SESSION CHAIR: Wojtek James Goscinski

Presenter(s):Olga Datskova


Our current research focuses on developing optimization methods for high-impact algorithms on low-power devices. Over the years, growing energy efficiency concerns within HPC (High Performance Computing) have brought to light a strong need for efficient software to take full advantage of power-optimized hardware. Exploitation of locality, data allocation and scheduling of operations in multi-core SoC (System on Chip) designs are critical and difficult for performance and energy efficiency in increasingly complex memory systems. In the present work, we focus on optimizing FFT (Fast Fourier Transform) as a case study for low-level data management and instruction scheduling in order to achieve execution and energy efficiencies close to the peak achievable by the architecture, the 40 nm TI (Texas Instruments) TMS320C6678 8-core DSP (Digital Signal Processor) with 64-bit floating point units and cores having a potential peak 64-bit performance of 7.5 GF at about 1W.

Chair/Presenter Details:

Wojtek James Goscinski (Chair) - Monash University

Olga Datskova - University of Houston

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