SC13 Home > SC13 Schedule > SC13 Presentation - Optimizing MPI Implementation on Massively Parallel Many-Core Architectures

SCHEDULE: NOV 16-22, 2013

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Optimizing MPI Implementation on Massively Parallel Many-Core Architectures

SESSION: Doctoral Showcase - Early Research Showcase

EVENT TYPE: Doctoral Showcase - Early Research Showcases

TIME: 3:30PM - 5:00PM

SESSION CHAIR: Wojtek James Goscinski

Presenter(s):Min Si

ROOM:601/603

ABSTRACT:
Many-core architectures, such as the Intel Xeon Phi, provide user application dozens of cores and hundreds of hardware threads. To efficiently utilize such architectures, application programmers are increasingly looking at hybrid programming models, where multiple threads often work with MPI, which is responsible for data communication. My doctoral research focuses on exploiting the capabilities of such massively threaded architectures in MPI. It can be broadly divided into three related pieces: internal multithreading in MPI, fine-grained consistency management in MPI, and MPI tasklets. We have so far focused on the first topic, enabling MPI to share idle threads from user applications. We parallelized the MPI functionality used in stencil computation routines as a case study. Preliminary results show that the parallel version provides up to a 40-fold speedup in MPI performance when parallelized across the entire Intel Xeon Phi board.

Chair/Presenter Details:

Wojtek James Goscinski (Chair) - Monash University

Min Si - University of Tokyo

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