SC13 Home > SC13 Schedule > SC13 Presentation - Power Efficient, Scalable Hybrid DSP+ARM+FPGA Platform for Computer Vision Tasks

SCHEDULE: NOV 16-22, 2013

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Power Efficient, Scalable Hybrid DSP+ARM+FPGA Platform for Computer Vision Tasks

SESSION: Emerging Technologies

EVENT TYPE: Emerging Technologies

TIME: 10:00AM - 5:30PM

ROOM:Booth 3547

Our objective is to demonstrate the capabilities of a new Digital Signal Processor (DSP), the Texas Instruments Keystone-II, with respect to its ability to perform real-time computer vision tasks on high resolution data. Our platform is comprised of a Keystone-II evaluation module (EVM) that is connected to a Xilinx Zynq 7020 FPGA which acts as an interface to both a USB video camera and an HDMI monitor. We will characterize this platform in terms of its performance, power efficiency, scalability, and applicability to next-generation aerial surveillance tasks. When serving as a coprocessor this DSP architecture potentially offers an equal or better performance-power ratio than state-of-the-art GPUs. General purpose computing using the TI DSP technology is still relatively obscure and its development tools and programming models are still immature. We hope this demonstration will inspire insightful discussion concerning the future of this technology as it relates to high performance computing.

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