SC13 Home > SC13 Schedule > SC13 Presentation - Algorithm/Architecture Codesign of Low Power and High Performance Linear Algebra Compute Fabrics

SCHEDULE: NOV 16-22, 2013

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Algorithm/Architecture Codesign of Low Power and High Performance Linear Algebra Compute Fabrics

SESSION: Doctoral Showcase - Dissertation Research

EVENT TYPE: Doctoral Showcase - Dissertation Research Showcase

TIME: 10:45AM - 11:00AM

SESSION CHAIR: Alistair Rendell

Presenter(s):Ardavan Pedram


We show the design of specialized compute fabrics that maintain the efficiency of full custom hardware while providing flexibility to execute a whole class of coarse- grain linear algebra and FFT operations. We have designed a specialized linear algebra processor (LAP) that can perform level-3 BLAS, more complex LAPACK level operations like Cholesky, LU (with partial pivoting), and QR factorizations, and even FFT operations. We present a power performance model that compares state of the art CPUs and GPUs with our design. Our power model reveals sources of inefficiencies in CPUs and GPUs, and our LAP design demonstrates how to overcome them. When compared to other conventional architectures for linear algebra applications, LAP is over orders of magnitude more power efficient. Based on our estimations up to 25 GFLOPS/W and double-precision efficiency is achievable on a single chip in standard 45nm technology.

Chair/Presenter Details:

Alistair Rendell (Chair) - Australian National University

Ardavan Pedram - University of Texas at Austin

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